VCOs are used widely in phase lock loops (PLLs) and for example in microprocessor clock generators. When designing VCOs, the designer aims to provide amongst other things a VCO having low power dissipation and the minimum dependency on production variations. When designing a VCO for a phase lock loop (PLL), in addition to these properties the VCO should also have a 50% duty cycle, a high operating frequency and good controllability. Good controllability is particularly important for the majority of PLLs wherein the VCO receives `pulse type` phase shift commands. Such pulses can appear at any time during the cycle, depending on circuit delays and process variations etc. Thus, in order to be able to react to these pulses, the VCO should be controllable during the entire cycle.
Ring oscillator structures are well known. This type of VCO typically comprises three or five inverters connected in a ring for providing the oscillations. Two or four of these stages respectively are controllable. This solution suffers from a number of drawbacks: it does not provide a 50% duty cycle, it is comparatively slow since one oscillation cycle requires circling the ring twice which means for a five-inverter ring, for example, passing through ten stages, and there is at least one uncontrollable stage so that during its transition the VCO is not controllable.
PLLs which provide a 50% duty cycle are known. However, they require a double frequency VCO whose output is then divided by 2.
There is therefore a significant need to provide an improved VCO wherein the above drawbacks are obviated.